Energy-Efficient Circuit Design Project

inv


Download gate netlist and SUE schematic Data summary: 1) General: Circuit: inv Process: 018tsmc Setup: Typical-Typical/25°C Tau= 7.3001e-12 s 2) Logical Effort paramters: f=(g*h+p) Chart: path:{a>>z} param:{td_r}{td_f}{td_a} p[td_r]=0.9951 g[td_r]=1.0888 p[td_f]=0.8799 g[td_f]=0.9111 p[td_a]=0.9372 g[td_a]=1.0000 Chart: path:{a>>z} param:{e} p[e]=5.895e-15 g[e]=7.64e-15
	Comparisons of interest: Charts for the parameter: e path compared:{a>>z} Charts for the parameter: td_r path compared:{a>>z} Charts for the parameter: td_f path compared:{a>>z} Charts for the parameter: td_a path compared:{a>>z}

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Last updated: 07/22/04.