12th IEEE Symposium on Computer Arithmetic
July 19-21, 1995
Bath, England, UK
General Chair: Simon Knowles
Program Co-Chairs: William H. McAllister
PrefaceSimon Knowles, William H. McAllister, "Twelve IEEE Symposium on Computer Arithmetic: Foreword"
Section 1: Table Methods
M. Ito, N. Takagi, S. Yajima, "Efficient Initial Approximation and Fast Converging Methods for Division and Square Root"
H. Hassler, N. Takagi, "Function Evaluation by Table Look-up and Addition"
D. Das Sarma, D. W. Matula, "Faithful Bipartite ROM reciprocal Tables"
Section 2: Multiplication - Milos D. Ercegovac, Chairman
H. Bederr, M. Nicolaidis, A. Guyot, "Analytic Approach for Error Masking Elimination in On-line Multipliers"
R. M. Owens, R. S. Bajwa, M. J. Irwin, "Reducing the Number of Counters Needed for Integer Multiplication"
C. Martel, V. Oklobdzija, R. Ravi, P. F. Stelling, "Design Strategies for Optimal Multiplier Circuits"
Chung Nan Lyu, D. W. Matula, "Redundant Binary Booth Recording"
Section 3: System Design and Techniques - Vojin G. Oklobdzija, Chairman
M. D. Ercegovac, T. Lang, "Sign Detection and Comparison Networks with a Small Number of Transitions"
A. Houelle, H. Mehrez, N. Vaucher, L. Montalvo, A. Guyot, "Application of Fast Layout Synthesis Environment to Dividers Evaluation"
M. J. Flynn, K. Nowka, G. Bewick, E. Schwarz, N. Quach, "The SNAP Project: Towards Sub-nanosecond Arithmetic"
Section 4: Integrated Circuits I - Michael J. Flynn, Chairman
B. W. Y. Wei, Du He, Chen Honglu, "A Complex-Number Multiplier Using Radix-4 Digits"
S. Cui, N. Burgess, M. Liebelt, K. Eshraghian, "A GaAs IEEE Floating-Point Standard Single Precision Multiplier"
G. Matsubara, N. Ide, H. Tago, S. Suzuki, N. Goto, "10-ns 55-b Shared Radix-2 Division and Square Root Using a Self-Timed Circuit"
Section 5: Elementary Functions - Joseph R. Cavallaro, Chairman
V. K. Jain, L. Lin, "High-Speed Double Precision Computation of Nonlinear Functions"
H. Kwan, R. L. Nelson Jr, E. E. Swartzlander Jr, "Cascaded Implementation of an Iterative Inverse-Square-Root Algorithm, with Overflow Lookahead"
Section 6: Divison and Square Root - Roger Woods, Chairman
T. Lang, P. Montuschi, "Very-High Radix Combined Division and Square Root with Prescaling and Selection by Rounding"
P. Soderquist, M. Leeser, "An Area/Performance Comparison of Subtractive and Multiplicative Divide/Square Root Implementations"
T. Coe, Ping Tak Peter Tang, "It Takes Six Onex to Reach a Flaw [Pentium Processor]"
Section 7: Integrated Circuits II - Dan Zuras, Chairman
R. K. Yu, G. B. Zyner, "167 MHz Radix-4 Floating Point Multiplier"
J. A. Prabhu, G. B. Zyner, "MHz Radix-8 Divide and Square Root Using Overlapped Radix-2 Stages"
T. Lynch, A. Ahmed, M. Schulte, T. Callaway, R. Tisdale, "The K5 Transcedental Functions"
Section 8: CORDIC/Modular Arithmetic - Israel Koren, Chairman
E. Antelo, J. D. Bruguera, J. Villalba, E. L. Zapata, "Redundant Cordic Rotator Based on Parallel Prediction"
Feng Zhou, P. Kornerup, "High Speed DCT/IDCT Using a Pipelined CORDIC Algorithm"
T. Hamano, N. Takagi, S. Yajima, F. P. Preparata, "O(n)-depth Circuit Algorithm for Modular Exponentiation"
H. Orup, "Simplifying Quotient Determination in High-Radix Modular Multiplication"
Section 9: Logarithmic Number Systems - David W. Matula, Chairman
J. M. Muller, A. Tisserand, A. Scherbyna, "Semi-Logarithmic Number Systems"
R. vanDrunen, L. Spaanenburg, P. Lucassen, J. A. G. Nijhuis, J. T. Udding, "Arithmetic for Relative Accuracy"
Section 10: Reliable Arithmetic - Belle W. Y. Wei, Chairman
C. Baumhof, "A New VLSI Vector Arithmetic Coprocessor for the PC"
W. E. Ferguson Jr, "Exact Computation of a Sum or Difference with Applications to Argument Reduction"
M. J. Schulte, E. E. Swartzlander Jr, "Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor"
D. Michelucci, "An e Arithmetic For Removing Degeneracies"