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16 ^{th} **

June 15-18, 2003

Santiago de Compostela,Spain

General Chair: Tomas Lang

Program Co-Chairs: Jean-Claude Bajard and Michael Schulte

[contents]Jean-Claude Bajard, Michael Schulte:

"Sixteenth IEEE Symposium on Computer Arithmetic: Foreword"

Session 1Keynote Speech-Jean-Claude Bajard, ChairmanDavid W. Matula, "Computer Arithmetic - An Algorithm Engineer's Perspective"

Session 2Luigi Dadda, ChairmanMultiplication-Zhijun Huang and Milos Ercegovac,

"High-Performance Left-to-Right Array Multiplier Design"Dimitri Tan and Albert Danysh,

"Multiple-Precision Fixed-Point Vector Multiply-Accumulator using Shared Segmentation"Nicolas Boullis and Arnaud Tisserand,

"Some Optimizations of Hardware Multiplication by Constant Matrices"Serdar S. Erdem and Cetin K. Koc,

"A Less Recursive Variant of Karatsuba Algorithm for Multiplying Operands of Size a Power of Two"

Session 3- Paolo Montuschi, ChairmanDivisionPeter Kornerup,

"Revisiting SRT Quotient Digit Selection"Mark McCann and Nicholas Pippenger,

"SRT Division Algorithms as Dynamical Systems"Eric Rice,

"A New Iterative Structure for Hardware Division: the Parallel Paths Algorithm"David Matula and Alexandru Fit-Florea,

"Prescaled Integer Division"

Session 4Andrew Beaumont-Smith, ChairmanFloating Point Arithmetic-Eric Schwarz, Martin Schmookler and Son Dao Trong,

"Hardware Implementations of Denormalized Numbers"Sylvie Boldo and Marc Daumas,

"Representable Correcting Terms for Possibly Underflowing Floating Point Operations"Guenter Gerwig, Eric Schwarz, Juergen Haess, and Holger Wetter,

"High Performance Floating-Point Unit with 116 bit wide Divider"Hossam Fahmy and Michael Flynn,

"The Case For a Redundant Format in Floating Point Arithmetic"

Session 5Eric Schwarz, ChairmanDecimal Arithmetic and Revisions to the IEEE 754 Standard for Floating-Point Arithmetic-Michael Cowlishaw,

"Decimal Floating-Point: Algorism for Computers"

Session 6Renato Stefanelli, ChairmanElementary Functions-Jean-Michel Muller,

"Partially Rounded: Small-Order Approximations for Accurate, Hardware-Oriented, Table-Based Methods"Cristina Iordache and Peter Tang,

"An Overview of Floating-Point Support and Math Library on the Intel XScale Architecture"Ren-Cang Li, Marc Daumas, and Sylvie Boldo,

"Theorems on Efficient Argument Reductions"Peter Markstein,

"Accelerating Sine and Cosine Evaluation with Compiler Assistance"

Session 7Tanya Vladimirova, ChairmanTesting and Error Analysis-Damien Stehle, Vincent Lefevre, and Paul Zimmermann,

"Worst Cases and Lattice Reduction"John Harrison,

"Isolating Critical Cases for Reciprocals using Prime Distribution"Abraham Ziv, Merav Aharoni, and Sigal Asaf,

"Solving Range Constraints for Binary Floating-Point Instructions"Guy Even, Peter-Michael, and Warren Ferguson,

"A Parametric Error Analysis of Goldschmidt's Division Algorithm"

Session 8Peter Montgomery, ChairmanCryptography-Amir Daneshbeh and Anwar Hasan,

"A Unidirectional Bit Serial Systolic Architecture for Double-Basis Division over GF(2^m)"Jean-Claude Bajard, Laurent Imbert, Christophe Negre, and Thomas Plantard,

"Efficient Multiplication in GF(p^k) for Elliptic Curve Cryptography"Arash Reyhani-Masoleh and Anwar Hasan,

"Low Complexity Sequential Normal Basis Multipliers over GF(2^m)"Soonhak Kwon,

"A Low Complexity and a Low Latency Bit Parallel Systolic Multiplier over GF(2^m) using an Optimal Normal Basis of Type II"

Session 9Alexandre Tenca, ChairmanPowering, Multiplication and Counters-Jose-Alejandro Pineiro, Milos Ercegovac, and Javier Bruguera,

"High-Radix Iterative Algorithm for Powering Computation"Christiane Frougny and Athasit Surarkes,

"On-line Multiplication in Real and Complex Base"Marcelo Kaihara and Naofumi Takagi,

"A VLSI Algorithm for Modular Multiplication/Division"Israel Koren, Yaron Koren, and Bejoy Oomman,

"Saturating Counters: Application and Design Alternatives"

Session 10Colin Walter, ChairmanNumber Systems-Graham Jullien, Vassil Dimitrov, and Khan Arif Wahid,

"Error-free Arithmetic for Discrete Wavelet Transforms Using Algebraic Integers"Sorin Cotofana, Casper Lageweg, and Stamatis Vassiliadis,

"On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge"Mark Arnold, Jesus Garcia, and Michael Schulte,

"The Interval Logarithmic Number System"Neil Burgess,

"Scaling an RNS Number Using the Core Function"

Session 11Peter-Michael Seidel, ChairmanModeling and Design of Arithmetic Components-Vojin Oklobdzija, Bart Zeydel, Sanu Mathew, and Ram Krishnamurthy,

"Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders"Vojin Oklobdzija and Ram Krishnamurthy,

Tutorial Abstract: "Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-offs Part 1"

"Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-offs Part 2"