20th IEEE Symposium on Computer Arithmetic
July 25-27, 2011
Chairs: Eric Schwarz and Vojin G. Oklobdzija
Technical Program Chairs: Elisardo Antelo, David Hough and Paolo Ienne
Eric Schwarz and Vojin G. Oklobdzija
D. Harvey and P. Zimmermann. "Short Division of Long Integers."
N. Brisebarre, M. Joldeş, P. Kornerup, É. Martin-Dorel and J.-M. Muller. "Augmented Precision Square Roots and 2-D Norms, and Discussion on Correctly Rounding sqrt(x^2+y^2)."
M. G. Arnold, J. Cowles, V. Paliouras and I. Kouretas. "Towards a Quaternion Complex Logarithmic Number System."
R. Che Ismail and J. N. Coleman. "ROM-less LNS."
A. Vázquez and J. D. Bruguera. "Composite Iterative Algorithm and Architecture for q-th Root Calculation."
O. Sarbishei and K. Radecka. "On the Fixed-Point Accuracy Analysis and Optimization of FFT Units with CORDIC Multipliers."
Special Session on Industrial
D. Lipetz and E. Schwarz. "Self Checking in Current Floating-Point Units."
C.-P. Jeannerod, J. Jourdan-Lu, C. Monat and G. Revy. "How to Square Floats Accurately and Efficiently on the ST231 Integer Processor."
T. Anderson, D. Bui, S. Moharil, S. Narnur, M. Rahman, A. Lell, E. Biscondi, A. Shrivastava, P. Dent, M. Yan and H. Mahmood. "A 1.5 Ghz VLIW DSP CPU with Integrated Floating Point and Fixed Point Instructions in 40 nm CMOS."
M. Boersma, M. Kröner, C. Layer, P. Leber, S. M. Müller and K. Schelm. "The POWER7 Binary Floating-Point Unit."
T. B. Preußer, M. Zabel and R. G. Spallek. "Accelerating Computations on FPGA Carry Chains by Operand Compaction."
N. Burgess. "Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI."
S. Gorgin and G. Jaberipur. "A Family of High Radix Signed Digit Adders."
S. Galal and M. Horowitz. "Latency Sensitive FMA Design."
S. Carlough, A. Collura, S. Mueller and M. Kroener. "The IBM zEnterprise-196 Decimal Floating-Point Accelerator."
Division, Square-Root and
J. A. Butts, P. T. P. Tang, R. O. Dror and D. E. Shaw. "Radix-8 Digit-by-Rounding: Achieving High-Performance Reciprocals, Square Roots, and Reciprocal Square Roots."
P. T. P. Tang, J. A. Butts, R. O. Dror and D. E. Shaw. "Tight Certification Techniques for Digit-by-Rounding Algorithms with Application to a New 1/sqrt(x) Design."
A. Nannarelli. "Radix-16 Combined Division and Square Root Unit."
D. W. Matula and M. T. Panu. "A Prescale-Lookup-Postscale Additive Procedure for Obtaining a Single Precision Ulp Accurate Reciprocal."
Special Session on High Performance
Arithmetic for FPGA's
M. Langhammer. "Teraflop FPGA Design."
F. de Dinechin. "The Arithmetic Operators You Will Never See in a Microprocessor."
R. Dimond, S. Racanière and O. Pell. "Accelerating Large-Scale HPC Applications Using FPGAs."
Arithmetic Algorithms for
F. Gandino, F. Lamberti, P. Montuschi and J.-C. Bajard. "A General Approach for Improving RNS Montgomery Exponentiation Using Pre-processing."
B. B. Brumley and D. Page. "Bit-Sliced Binary Normal Basis Multiplication."
J. W. Bos, T. Kleinjung, A. K. Lenstra and P. L. Montgomery. "Efficient SIMD Arithmetic Modulo a Mersenne Number."
Tools for Formal Certified Code
C. Mouilleron and G. Revy. "Automatic Generation of Fast and Certified Code for Polynomial Evaluation."
S. Boldo and G. Melquiond. "Flocq: A Unified Library for Proving Floating-Point Algorithms in Coq."