3rd IEEE Symposium on Computer Arithmetic

November 19-20, 1975
Southern Methodist University, Dallas, Texas

General Chair: T. R. N. Rao
Program Co-Chair: David W. Matula


[contents]

Preface

T. R. N. Rao and D. W. Matula, "The Third IEEE Symposium on Computer Arithmetic: Foreword"

Section 1: Mathematical Foundation of Computer Arithmetic - U. Kulisch, Chairman

U. Kulisch, "Mathematical Foundation of Computer Arithmetic"

G. Bohlender, "Floating-Point Computation of Functions with Maximum Accuracy"

R. Klatte and Ch. Ullrich, "Consequences of a Properly Implemented Computer Arithmetic for Periodicities of Iterative Methods"

P. H. Sterbenz, "Understandable Arithmetic"

J. G. Kent, "Comparison Set: A Useful Partitioning of the Space of Floating-Point Operand Pairs"

Section 2: Control and Monitoring of Precision - N. Metropolis, Chairman

P. Kornerup, "A Unified Numeric Data Type in Pascal"

A. L. Lang and B. D. Shriver, "The Design of a Polymorphic Arithmetic Unit"

M. Ginsberg and D. J. Frailey, "The Design and Use of a Floating-Point (Software) Simulator for Testing the Arithmetic Behavior of Mathematical Software"

R. L. Bivins and N. Metropolis, "Significance Arithmetic: Application to a Partial Differential Equation"

D. J. Kuck, D. S. Parker and A. H. Sameh, "ROM Rounding: A New Rounding Scheme"

R. A. Keir, "Programmer-Controlled Roundoff and the Selection of a Stable Roundoff Rule"

Section 3: Number Systems - W. Cody, Chairman

A. Gabrielian, "Formal Systems of Numerals"

R. A. Keir, "Compatible Number Representations"

A. Avizienis, "Redundancy in Number Representations as an Aspect of Computational Complexity of Arithmetic Functions"

D. W. Matula, "Fixed-Slash and Floating-Slash Rational Arithmetic"

E. V. Krishnamurthy, "Matrix Processors Using p-ADIC Arithmetic for Exact Linear Computations"

J. P. Chinal, "Mirror Arithmetic"

Section 4: Residue Arithmetic and Error Control - H. Garner, Chairman

A. Svoboda, "Self-Checking Adder for Large Scale Integration"

D. K. Banerji, "On Combinational Logic for Sign Detection in Residue Number Systems"

R. T. Gregory and D. W. Matula, "Base Conversion in Residue Number Systems"

J. P. Chinal, "The Logic of Modula 2k+1 Adders"

Section 5: Arithmetic Algorithms and Their Analysis - J. Robertson, Chairman

K. S. Trivedi, "On the Use of Continued Fractions for Digital Computer Arithmetic"

M. D. Ercegovac, "A General Method for Evaluation of Functions in a Digital Computer"

D. E. Atkins, "Higher-Radix, Non-Restoring Division: History and Recent Developments"

K. S. Trivedi and M. D. Ercegovac, "On-Line Algorithms for Division and Multiplication"

Section 6: Case Studies of Arithmetic Processor Design and Implementation - A. Avizienis, Chairman

C. Stephenson, "Case Study of the Pipelined Arithmetic Unit for the TI Advanced Scientific Computer"

T. H. Kehl and K. Burkhardt, "A Minicomputer Microprogrammable, Arithmetic Processor"

B. Shriver and P. Kornerup, "The UNRAU - A Unified Numeric Representation Arithmetic Unit"

Section 7: Ultra-High Speed Arithmetic for Special Purpose Processors - T. C. Chen, Chairman

C. Foster, E. Riseman, F. Stockton and C. Wogrin, "A Novel Multiply-by-Three Circuit"

M. Benedek, "Developing Large Binary to BCD Conversion Structures"

G. J. Lipovski, "On Residue Number A/D and D/A Converters"

A. Weinberger, "High-Speed Zero-Sum Detection"

Section 8: Parallelism and Array Logic - S. Winograd, Chairman

D. P. Agrawal, "Optimum Array-Like Structures for High-Speed Arithmetic"

G. W. Cobb, "The Impact of Parallelism on Software"

L. N. Goyal, "Design of an Arithmetic Element for Serial Processing in an Iterative Structure"

R. De Mori, M. Elia and A. Serra, "Minimization Methods for Macrocellular Arithmetic Networks"

Bibliography

B. D. Shriver and E. K. Reuter, "A Bibliography on Computer Arithmetic"