D. M. Lewis, L. K. Yu, "Algorithm Design for a 30-bit Integrated Logarithmic Processor", Proceedings of the 9th IEEE Symposium on Computer Arithmetic, Santa Monica, California, September 6-8, 1989
D. M. Lewis, "An Accurate LNS Arithmetic Unit Using Interleaved Memory Function Interpolator", Proceedings of the 11th IEEE Symposium on Computer Arithmetic, Windsor, Ontario, Canada, June 29 - July 2, 1993
D. Lewis, "Complex Logarithmic Number System Arithmetic Using High-Radix Redundant CORDIC Algorithms", Proceedings of the 14th IEEE Symposium on Computer Arithmetic, Adelaide, Australia, April 14-16, 1999