(500 random vectors HSpice Simulation Results)

References

1.  K. Chirca, M. Schulte, J. Glossner, H. Wang, S. Mamidi, P. Bazola, S. Vassiliadis, "A Static Low-Power, High-Performance 32-bit Carry Skip Adder", Euromicro Symposium on Digital System Design, DSD '04, Aug. 31-Sept. 3, 2004
2. Min Cha, E. E. Swartzlander Jr, "Modified Carry Skip Adder for Reducing First Block Delay", Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems, 8-11 Aug. 2000.