S. Cui, N. Burgess, M. Liebelt, K. Eshraghian, "A GaAs IEEE Floating-Point Standard Single Precision Multiplier", Proceedings of the 12th IEEE Symposium on Computer Arithmetic, Bath, England, July 19-21, 1995
A. Beaumont-Smith, N. Burgess, "A GaAs 32-bit Adder", Proceedings of the 13th IEEE Symposium on Computer Arithmetic, Asilomar, California, July 6-9, 1997
N. Burgess, "Scaled and Unscaled Residue Number System to Binary Conversion Techniques Using the Core Function", Proceedings of the 13th IEEE Symposium on Computer Arithmetic, Asilomar, California, July 6-9, 1997
A. Beaumont-Smith, N. Burgess, S. Lefrere, C. C. Lim, "Reduced Latency IEEE Floating-Point Standard Adder Architectures", Proceedings of the 14th IEEE Symposium on Computer Arithmetic, Adelaide, Australia, April 14-16, 1999
Neil Burgess, Luigi Ciminiera, "Fiftheenth IEEE Symposium on Computer Arithmetic: Foreword", Proceedings of the 15th IEEE Symposium on Computer Arithmetic, Vail, Colorado, June 11-13, 2001
Neil Burgess, "Scaling an RNS Number Using the Core Function", Proceedings of the 16th IEEE Symposium on Computer Arithmetic, Santiago de Compostela, Spain, June 15-18, 2003
N. Burgess, C. N. Hinds, "Design of the ARM VFP11 Divide and Square Root Synthesisable Macrocell", Proceedings of the 18th IEEE Symposium on Computer Arithmetic, Montpellier, France, June 25-27, 2007