Synthesizable Processor

We are using the LEON2 processor as an example of the feasibility to integrate DETFFs into a design.  The LEON2 processor is a synthesisable VHDL model of a 32-bit processor compliant with the SPARC V8 acrhitecture. The model is highly configurable and the configuration is shown in the LEON Processor link. 

Tools and Design Flow

The design flow must be modified to incorporate the DETFFs into the processor.  The proposed modified design flow is shown below.  We are using the Synopsys Tool Flow which includes the following tools: