9^th IEEE Symposium on Computer Arithmetic

September 6-8, 1989
Santa Monica, California, USA

General Chair: Algirdas Avizienis
Program Co-Chairs: Milos D. Ercegovac and Earl Swartzlander


[contents]

Preface

A. Avizienis, M. D. Ercegovac, E. Swartzlander, "The Ninth IEEE Symposium on Computer Arithmetic: Foreword"

Section 1: Number Systems - James E. Robertson, Chairman

A. M. Azmi, F. Lombardi, "On a Tapered Floating Point System"

J. Schwarz, "Implementing Infinite Precision Arithmetic"

P. R. Turner, "A Software Implementation of SLI Arithmetic"

Section 2: On-Line Arithmetic - I - Mary Jane Irwin, Chairman

H. Lin, H. J. Sips, "On-line CORDIC Algorithms"

R. H. Brackert Jr, M. D. Ercegovac, A. N. Willson Jr, "Design of an On-line Multiply-Add Module for Recursive Digital Filters"

P. K. Tu, M. D. Ercegovac, "Design of On-line Division Unit"

Section 3: Function Generation, Division and Square Root - Naofumi Takagi, Chairman

H. M. Ahmed, "Efficient Elementary Function Generation with Multipliers"

D. L. Fowler, J. E. Smith, "An Accurate, High Speed Implementation of Division by Reciprocal Approximation"

J. Fandrianto, "Algorithm for High Speed Shared Radix-8 Division and Radix-8 Square Root"

Section 4: Adders and Convolvers - William McAllister

L. Dadda, "Polyphase Convolvers"

P. K. Chan, M. D. F. Schlag, "Analysis and Design of CMOS Manchester Adders with Variable Carry-Skip"

S. Turrini, "Optimal Group Distribution in Carry-Skip Adders"

Section 5: On-Line Arithmetic - II - Tomas Lang, Chairman

A. Guyot, Y. Herreros, J. M. Muller, "JANUS, an On-line Multiplier/Divider for Manipulating Large Numbers"

J. Duprat, Y. Herreros, J. M. Muller, "Some Results about On-line Computation of Functions"

P. Kornerup, D. W. Matula, "Exploiting Redundancy in Bit-Pipelined Rational Arithmetic"

Section 6: Floating-Point Arithmetic - George Taylor, Chairman

P. Johnstone, F. E. Petry, "Higher Radix Floating Point Representations"

M. Petkovsek, "Contiguous Digit Sets and Local Roundings"

M. G. Arnold, T. A. Bailey, J. R. Cowles, J. J. Cupal, "Redundant Logarithmic Number Systems"

Section 7: Square Root and Division - Tony Carter, Chairman

P. Montuschi, L. Ciminiera, "On the Efficient Implementation of Higher Radix Square Root Algorithms"

M. D. Ercegovac, T. Lang, "Radix-4 Square Root Without Initial PLA"

M. D. Ercegovac, T. Lang, "On-the-fly Rounding for Divison and Square Root"

Section 8: Processors - Stewart G. Smith, Chairman

M. R. Santoro, G. Bewick, M. A. Horowitz, "Rounding Algorithms for IEEE Multipliers"

T. M. Carter, "Cascade: Hardware for High/Variable Precision Arithmetic"

D. M. Lewis, L. K. Yu, "Algorithm Design for a 30-bit Integrated Logarithmic Processor"

Section 9: Residue Arithmetic - Renato Stefane, Chairman

K. M. Elleithy, M. A. Bayoumi, K. P. Lee, "O(log N) Architectures for RNS Arithmetic Decoding"

D. Gamberger, "Incompletely Specified Numbers in the Residue Number System - Definition and Applications"

C. K. Koc, P. R. Cappello, "Systolic Arrays for Integer Chinese Remaindering"

Section 10: Optical Arithmetic, Error Detection, and Encoding - Jean-Michel Muller, Chairman

K. Hwang, D. K. Panda, "Optical Arithmetic using High-Radix Symbolic Substitution Rules"

J. C. Lo, S. Thanawastein, T. R. N. Rao, "Concurrent Error Detection in Arithmetic and Logical Operations Using Berger Codes"

N. Rishe, "Lexicographic Encoding of Numeric Data Fields"