10th IEEE Symposium on Computer Arithmetic

June 26-28, 1991
Grenoble, France

General Chair: Jean-Michel Muller
Program Co-Chairs: Peter Kornerup and David W. Matula



Jean-Michel Muller and Peter Kornerup, "The Tenth IEEE Symposium on Computer Arithmetic: Foreword"

Keynote Speech

W. J. Cody, "Arithmetic Standards: The Long Road" (abstract)

Session 1: Number Systems - Michel Scott, Chairman

J. Duprat, Y. Herreros, S. Kla, "New Redundant Representations of Complex Numbers and Vectors"

F. Chatelin, V. Fraysse, "Analysis of Arithmetic Algorithms: A Statistical Study"

C. Frougny, "Representation of Numbers in Non-Classical Numeration Systems"

G. Bohlender, W. Walter, P. Kornerup, D. W. Matula, "Semantics for Exact Floating Point Operations"

Session 2: Multiplication - Simon Knowles, Chairman

M. S. Peterson, U. Zwick, "Shallow Multiplication Circuits"

N. Takagi, "A Radix-4 Modular Multiplication Hardware Algorithm Efficient for Iterative Modular Multiplications"

M. Mehta, V. Parmar, E. Swartzlander Jr, "High-Speed Multiplier Design Using Multi-Input Counter and Compressor Circuits"

H. Orup, P. Kornerup, "A High-Radix Hardware Algorithm for Calculating the Exponential ME Modulo N"

Session 3: Inner Products - Svetoslav Markov, Chairman

D. Zhang, G. A. Jullien, W. C. Miller, E. Swartzlander Jr, "Arithmetic for Digital Neural Networks"

M. Muller, C. Rub, W. Rulling, "Exact Accumulation of Floating-Point Numbers"

A. Knofel, "Fast Hardware Units for the Computation of Accurate Dot Products"

Session 4: Residue Arithmetic - Magdy Bayoumi, Chairman

J. -S. Chiang, Mi Lu, "A General Division Algorithm for Residue Number Systems"

D. Gamberger, "New Approach to Integer Division in Residue Number Systems"

N. Wigley, G. A. Jullien, D. Reaume, W. C. Miller, "Small Moduli Replications in the MRRNS"

S. J. Piestrak, "Design of Residue Generators and Multioperand Modular Adders Using Carry-Save Adders"

Session 5: Floating Point Range and Precision - Renato Stefanelli, Chairman

H. Yokoo, "Overflow/Underflow-Free Floating-Point Number Representations with Self-Delimiting Variable-Length Exponent Field"

P. R. Turner, "Implementation and Analysis of Extended SLI Operations"

T. E. Hull, M. S. Cohen, C. B. Hall, "Specifications for a Variable-Precision Arithmetic Coprocessor"

D. M. Priest, "Algorithms for Arbitrary Precision Floating-Point Arithmetic"

Session 6: Adders I - Tony Carter, Chairman

V. Kantabutra, "Designing Optimum Carry-Skip Adders"

P. K. Chan, M. D. F. Schlag, C. D. Thomborson, V. G. Oklobdzija, "Delay Optimization of Carry-Skip Adders and Block Carry-Lookahead Adders"

T. Lynch, E. Swartzlander, "The Redundant Cell Adder"

Session 7: Adders II - Mary-Jane Irwin, Chairman

L. Kuhnel, "Optimal Purely Systolic Addition"

J. E. Vuillemin, "Constant Time Arbitrary Length Synchronous Binary Counters"

Session 8: Division II - George Taylor, Chairman

R. Alverson, "Integer Division Using Reciprocals"

D. C. Wong, M. J. Flynn, "Fast Division Using Accurate Quotient Approximations to Reduce the Number of Iterations"

P. Montuschi, L. Ciminiera, "Simple Radix-2 Division and Square Root with Skipping of Some Addition Steps"

T. E. Williams, M. A. Horowitz, "A 160ns 54-bit CMOS Division Implementation Using Self-Timing and Symmetrically Overlapped SRT Stages"

Session 9: GCD and Standard Functions - S. M. Sedjelmaci, Chairman

S. N. Parikh, D. W. Matula, "A Redundant Binary Euclidean GCD Algorithm"

A. Guyot, "OCAPI: Architecture of a VLSI Coprocessor for the GCD and the Extended GCD of Large Numbers"

P. T. P. Tang, "Table-lookup Algorithms for Elementary Functions and Their Error Analysis"

W. E. Ferguson Jr, T. Brightman, "Accurate and Monotone Approximations of Some Transcendental Functions"

Session 10: On-Line and Signal Processing - Henk J. Sips, Chairman

P. K. -G. Tu, M. D. Ercegovac, "Application of On-line Arithmetic Algorithms to the SVD computation: Preliminary Results"

S. -Fu Hsiao, J. -M. Delosme, "The CORDIC Householder Algorithm"

J. -A. Lee, T. Lang, "SVD by Constant-Factor-Redundant-CORDIC"

A. A. J. de Lange, E. F. Deprettere, "Design and Implementation of a Floating-Point Quasi-Systolic General Purpose CORDIC Rotator for High-Rate Parallel Data and Signal Processing"